what is always@(*) verilig2001 equivalent syntax in SystemC?

[anindya.hazra]

In Verilog 2001 there is syntax always@(*). It considers all inputs used inside process are taken care in sensitivity list. Is there any equivalent syntax in SystemC?

[apfitch]

No.

 

regards

Alan

[dakupoto]

In Verilog 2001 there is syntax always@(*). It considers all inputs used inside process are taken care in sensitivity list. Is there any equivalent syntax in SystemC?

 

Hello Sir,

Unfortunately there is no equivalent construct in SystemC. Please note that

SystemC is basically C++ with artificially imposed concurrency and time 

features. Verilog was designed right from the start with concurrency and

time. Hope that helps.