MehulPithva Posted July 21, 2015 Report Share Posted July 21, 2015 Hi,I am using uvm standard register model , register adapter (bus2reg & reg2bus) to send and receive transaction to ral model and DUT.and it is working fine if i do single read and write.(means i perform the 32 bit read n write using reg.read(status,address,data)reg.write(status,address,data)) My challange is that i have to perform the more than 32 bit transaction which performs the read and write on multiple registers,If there any way to use the same reg.read/write method to perform more than one register Quote Link to comment Share on other sites More sharing options...
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