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Parameterized UVC ?

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Is there a way to parameterize an UVM UVC ?

The UVC is designed to have a MAX_LANES = 64. For a particular testbench, I want to configure this UVC to only has MAX_LANES=8. The following code doesn't work :

class demo_tb extends uvm_env;


bss_uvc_frmbuf_env #(.MAX_LANES(8)) frmbuf_env;

function new (string name, uvm_component parent);

super.new(name, parent);

endfunction : new

extern virtual function void build_phase(uvm_phase phase);

endclass : demo_tb

function void demo_tb::build_phase(uvm_phase phase);


frmbuf_env = bss_uvc_frmbuf_env #(.MAX_LANES(8)) ::type_id::create("frmbuf_env", this);

endfunction : build_phase

I got the following error :

ncelab: *E,TYCMPAT (./examples/demo_tb.sv,74|68): assignment operator type check failed (expecting datatype compatible with 'specialization of class bss_uvc_frmbuf_env' but found 'class bss_uvc_frmbuf_env' instead).

ncelab: *F,CUPKGE: Elaboration cannot proceed: design unit 'demo_base_test' uses a SystemVerilog class 'demo_tb' for which an elaboration error occurred.

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  • 11 months later...


I was facing the same error and then realized that the object which factory was creating did not accept parameters. Parameters in class declaration were used but when factory registration using macro was done there were no parameters used. Thus, when factory created the class objects it could not understand parameters properly.

Thank you.


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  • 1 month later...

Specifically, your class definition for bss_uvc_frmbuf_env should look something like this:

class bss_uvc_frmbuf_env #(int MAX_LANES = 1) extends uvm_env;
endclass : bss_uvc_frmbuf_env

You need to be able to register the specialization with the factory, so that you can use the factory create to build the instance of that specialized type.

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