Question for array of class

[yyn]

Hi,

I have a question of `uvm_do() macro usage.

The following is an example code.

class my_transfer extends uvm_object;

rand string direction;

rand bit [31:0] addr;

rand bit [31:0] wdata;

endclass

class my_transaction extends uvm_sequence_item;

rand int delay_before_transaction;

rand int transfer_size;

constraint const_c { transfer_size < 1000; }

rand my_transfer transfers[];

constraint transfer_c {transfers.size() == transfer_size; }

rand int delay_to_req_end;

endclass

In my sequence class, I want to execute like below code. But randomization is failed. Becuase there is no allocation of "transfers" array.

virtual task body();

`uvm_do(req);

// or

`uvm_do_with(req, {req.transfer_size == 7; req.transfers[0].direction == READ; })

endtask

If above sequence works, how should I modify my code? Is there any simple example?

(I want that each transfer within transaction has constrained-random value for each field and I want to control this constraint in test senario or sequence.)

Thanks & Regards,

YYN

Edited July 20, 2011 by yyn
typo

[adielkhan]

Hi,

There are several ways to do what you ask.

one way is:

You could upfront `uvm_create the object and then do

for(int i =0; i<transfer_size; i++); req.transfers=new;

alternatively:

lets assume all my_transfer array assignments happen after my_transaction variables are set.

add to class my_transaction

      function void post_randomize();
 foreach (transfers[i])  transfers[i]= new();
     endfunction

then lets assume you need to update req with the relevant data before it is send to the driver.

add to sequence, perform aray assignment:

  virtual task body();
     `uvm_do_with(req, {transfer_size==7;})      
     endtask 
  function  void mid_do (uvm_sequence_item this_item);
     req.transfers[0].direction=READ;
  endfunction

There are other ways to achieve this, so it really depends on what you want to do.

Also, have a look at the send_request() and sequence API in the class-ref.

FYI, you probably dont want "rand string direction".

instead try:

typedef enum {READ,WRITE} direction_t;
class my_transfer extends uvm_sequence_item;
  rand direction_t direction;

thanks,

adiel.

[uwes]

hi,

another option is to avoid the rand-array-allocation issue at all is to generate the elements on the fly and NOT the full array upfront. if you do have dependencies between the transactions you can add inline constraints using the uvm_do_*_with class of macros and refer to send items.