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Posted

The term "interconnect components" generally maps to the concept of a bus (e.g. AXI, PCI). TLM connections are 1:1. An interconnect component is responsible for address mapping and potentially concepts such as broadcasting. A bridge may also be considered as an interconnect component.

Posted

Hi,

loosely-timed TLM with temporal decoupling:

i have 2 initiators and a target(memory). Init1 writes to the memory and Init2 reads the memory(Init2 controls and overrides the entries when neccessary).

I want init2 to be notified every time init1 wrote into the memory.

Which possibilities do i have?

Help pls.

Posted

Hi Tanja,

We generally advise that in a loosely timed model it is best if the initiators make sure that code executes according to a defined schedule i.e. the software application running on the initiators should handle locking of shared resources and so on. The intention is that if the model is refined to approximately-timed, or if you put delays in the loosely timed targets, the behaviour of the application should still be correct (though of course the performance may not be good enough).

So I would say that you would have to explicitly synchronize init2 by notifying an event in init1 when init1 writes to memory.

regards

Alan

Posted

Hi Alan,

as advised i declared an event (init1_ev) in a file.h as extern, so that i could use in my files init1.cpp und init2.cpp.

After init1 writes to the memory, it does init1_ev.notify()

In init2 i have following sc_thread, which is sensitive to init1_ev;

init2_thread

{

while (true)

{

wait(init1_ev);

cout << "notification received";

}

}

init2_thread is never triggered. Why?

Thank you.

Posted

The only reasons could be a) the init1 thread never suspends so init2_thread never gets a chance to run or

B) the wait(init1_ev) is not waiting when the event is notified (but that would probably only be true once a time zero)

regards

Alan

Posted

Hi Alan,

u are right, there is no wait()-statement in init1 thread.

wait(t): does it matter how long init1 is suspended?

i add it in init1 thread and init2 works. But not init3, which is also sensitive to the same event. Any ideas why?

thanks a lot.

Posted

If you're going to create synchronization between threads, then I guess the length of the wait doesn't matter, it's only purpose is to allow another thread to run and create a scheduling order in your simulation.

Regarding init3, I'm not sure - if both threads are waiting for the same notification I'm puzzled.

regards

Alan

Posted

Hi,

let's assume:

i have 4 initiators writing to differents parts of a memory(target) through 1 interconnect-component.

i additionnaly have a 5th initiator, which is waiting for notifications from the other initiators to read the new entry in the memory and evaluates it.

Can i pre-define in which order the 4 Writer-initiators are going to acces the memory?

The Reader-initator only have one thread. Can i implement a queue of incoming event-notifications to make sure that he always completes his evaluation before jumping to the next one and to make sure that he acts by respecting the order of incoming notifications? If yes, which is the easiest way to do so?

thank you very much

Posted

hi,

can someone pls tell me what does this error mean?

Error: (E549) uncaught exception: bad allocation

In file: c:\users\...\systemc-2.3.0\src\sysc\kernel\sc_except.cpp:98

thank you.

Posted

You run out of memory and a "new" expression throws an exception.

I have a model with at least 15 components and i run out of memory at the instatiation of the 5th one! How can i gain memory or what can i do?

Posted

I have a model with at least 15 components and i run out of memory at the instatiation of the 5th one! How can i gain memory or what can i do?

This is very hard to tell, without any details about your model or the individual components. Options include

  • Use less memory in your model (and look for memory leaks).
  • Buy more physical memory from your favourite hardware shop.
  • Switch to a 64-bit simulation (assuming you have enough physical memory), since 32-bit processes are usually limited to a 2GB address space.

Do you allocate (very) large memories (i.e. arrays) in your model?

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