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[Cadence] Could irun supported concatenated function code or regaular express?

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Cadnece Gentlemen,

As a user of both irun and vcs, I think it is a pity that some useful syntax that irun does not support. For example as you could see below attached code, the line which marked "VCS only" in the following uvm_reg related code.

I could understand that you do not support regualar expression because LRM seems does not have it. however, I can not find other alternative way for this purpose. (LRM should consider to add this.)

For the concatenated function call(). it is also important because it improves the readibilty a lot. I need to write 2 more lines to write the same thing.

I hope that someday irun could also support these features. thanks! (now I am using 10.20s15)

foreach (regs[i])
      // Ignore all RST or CK Control registers
      if ( regs[i].get_name().match(".*[RST|CK]_CTRL.*") ) continue; // VCS only

      // Write a Random value to the "RW" fields.
      foreach (field[j])
        if ( fields[j].get_access().compare("RW") ) // VCS only
          field[j].set($urandom % (1<<filed[j].get_n_bits()));

      // Updates to DUT and read back with checks.
      regs[i].mirror(st, UVM_CHECK);

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as this is an UVM forum you may use the following for the regex:

// untested code :-)
chandle r = dpi_regcomp(".*[RST|CK]_CTRL.*");
if(dpi_regexec(r,regs[i].get_name()) $display("found");

you can wrap this into a function to beautify it.


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There is not only the uvm_regex.cc, but also an uvm_regex.svh there. so I could invoke it directly without introducing dpi. also share my test results below.

bit rv; 
string str, re;
re = "(RST)|(CTL)_CTRL’’;
str = "RST_CTRL";
rv = uvm_re_match(re, str);

several test results are fine.

uvm_regex: re = RST{3}, str = RSTTTT, rv = 0

uvm_regex: re = RST{3}, str = RSTTT, rv = 0

uvm_regex: re = RST{3}, str = RSTT, rv = 1

uvm_regex: re = [A|B]+, str = BB, rv = 0

uvm_regex: re = [A|B]+, str = CC, rv = 1

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