Use cases of TLM over systemC

[amitk3553]

What are the advantages of using TLM over systemC

 

in systemc we are using port-channel-port

 

while in TLM socket_initiator- socket_target

 

But the machanism of communication in both SystemC and TLM approx same. in both at the transmission side we call method and same at the receiver side.

 

ya in TLM we are passing payload.

 

What I am not able to see the advantage of TLM over systemC

 

Would u  explain this to me how its different from systemC and ADVANTAGES of using TLM.

 

 

 

 

Thanks

cam 

[apfitch]

Hi Cam,

  the idea of TLM2 was to create a standard API for transaction level modelling, that runs at high speed, and models memory-mapped buses.

 

So the TLM Working group decided to create standard functions for both blocking and non-blocking transport; and a standard payload object.

 

So the first advantage of using TLM2 over plain SystemC is simply that it is a standard API and payload.

 

To model pipelined transactions, the TLMWG decided to use function calls from target to initiator and initiator to target. To allow function calls to be made in both directions needs a port on the calling module and an export on the target (forward), and a port on the target model connected to an export on the initiator. You could of course do this without sockets but you'd have to make two connections - by using a socket, a single bind call connects both export and port. Also you'd have to explicitly declare the initiator port and target export with tlm_transport_fw_if, and the target port and initiator socket with tlm_transport_bw_if - initiator socket is based on tlm_transport_fw_if and the target socket on tlm_transport_bw_if so you get that "for free".

 

Finally, the sockets also have extra template arguments compared to SystemC ports - the Bus Width parameter. This ensures that the user cannot accidentally connect busses of different widths together.

 

kind regards

Alan

 

P.S. There is another answer I could give:

TLM2 *is* SystemC there is no difference. An initiator is a channel that implements the tlm_bw_transport_if. The target is a channel that implements the tlm_fw_transport_if. So the only difference from the "traditional" use of SystemC is the idea of a socket to provide simultaneous binding of the both port and export. If you want to, you could create your own exports and ports, and connect them yourself.

[amitk3553]

Thanks Alan,

 

My some doubts

 

1) As we use SystemC for architecture Exploration, So how could we say whether to use TLM 2.0 on plain SystemC to model memory mapped buses. Means Even if we don't know about architecture(memory mapped buses are there or not), then first need is to explore the architecture, after exploring architecture we would know which component will be there or not, after knowing about architecture(Mapped memory buses are there), then why we need to develop model using TLM. As the work of architecture exploration is already done with systemC.

 

2) If in case we had to transmit serial data b/w two modules then why we need TLM.

 

3)Like there is hierarchy of modules means connected as below given below:

module_1--module_2--module3

 

Further then there are sub blocks in module 2

then in that case would be use TLM just between 1-2-3 and also in the further sub blocks of  module2  

 

4) Means how would we decide where to use TLM or where not, like we can divide the module(Some block) in further four modules to have communication through TLM in these modules.Means we can divide functionality in no. of modules?

 

5)Are there fifos in SystemC ?          

[apfitch]

Hi Cam,

 

1) Yes you can use TLM2 even if the architecture is not yet known. This would be typically the "loosely timed" style, with b_transport. This is similar to what some people call the Programmers View - it can be used by software developers to write code, without knowing the detailed architecture of the platform - even before the architecture is known.

 

To do architecture exploration using TLM2, you would move to the "approximately timed" style, with non-blocking function calls. This can model pipelined transactions etc.

 

2) TLM doesn't care whether the data is serial or parallel. It simply sends arrays of bytes. If you are modelling serial data you could do it in TLM by

  sending a byte with a time annotation representing the length of the serial transfer

 

You could even set the socket width to 1 if you wanted to.

 

If you need to model at RTL, you are better off using SystemC, or , even better, Verilog or VHDL.

 

TLM is meant to be more abstract, and hence faster. Why model individual serial bits with a clock, which you can just call a function that transfers a byte, or many bytes, in one go?

 

3) Yes, TLM sockets can be connected hierarchically child-parent and parent-child, just as SystemC ports and exports can.

 

4). TLM is intended for high level modelling. The model is written using Initiators (creating transactions e.g. a CPU or a keyboard), Targets (e.g. a RAM, a display etc) and Interconnects (e.g. AHB Bus, AXI Bus, I2C bus).

 

If you can describe your system like that, you can do it in TLM.

 

5). Yes, sc_fifo

 

regards

Alan

[amitk3553]

Hi alan,

 

I required a queue or fifo, in which i have to write and read from that. implementation of the this functionality would be somewhat like below, please correct or give me some brief idea:

 

sc_fifo  fifo_1;     // creating a fifo by making instance of systemC fifo

fifo_1.put(value); // write data in fifo

fifo_1.get();         // read from fifo

 

How i specify that fifo is of like 8*9 or 5*6 locations.

and could we use pointer in SystemC for pointing locations.        

[apfitch]

sc_fifo has its size set by a constructor argument. E.g. in a function you can write

 

sc_fifo<int> fifo_1(72);

 

to get a depth of 72 (72 locations).

 

regards

Alan

[amitk3553]

Thanks alan,

 

some more questions:

 

1) How would we set the size of each location of fifo_1?

2) We create queues(linked list) using pointer in c++.So which approach would be most useful ? sc_fifo or queues as in C++.as we can perform same operation in both.

 

 

Regards

cam                                           

[apfitch]

1) Change the data type in the template parameter e.g.

 

  sc_fifo <myclass>  fifo

 

and then myclass can be a wrapper for whatever data you want. You must follow the rules for data in primitive channels (operator= etc).

 

2) It depends if you want primitive channel behaviour. sc_fifo operates with delta cycles. If you don't need delta cycles, you could just use an STL deque (for instance)

 

Alan

[amitk3553]

thanks alan,

[amitk3553]

1) Change the data type in the template parameter e.g.

 

  sc_fifo <myclass>  fifo

 

and then myclass can be a wrapper for whatever data you want. You must follow the rules for data in primitive channels (operator= etc).

 

2) It depends if you want primitive channel behaviour. sc_fifo operates with delta cycles. If you don't need delta cycles, you could just use an STL deque (for instance)

 

Alan

Hello alan,

 

One more thing

Please explain the meaning of following line:

sc_fifo operates with delta cycles

 

Regards

cam

[apfitch]

sc_fifo is derived from sc_prim_channel, so operates with the evaluate/update (delta cycle) behaviour of primitive channels.

There's an explanation of primitive channels at

 

http://www.doulos.com/knowhow/systemc/tutorial/primitive_channels/

 

regards

Alan

[foster911]

@ mitk3553

 

As every SystemC user know, modeling in TLM2 is the most complicated job for the developers and because of misunderstanding the TLM concept, it seems that TLM2 would be undiscoverable.

I believe that most aspects of modeling and verification tasks are for software designers not hardware ones. TLM2 is one of those aspects and the reason why hardware designers with verilog background have always trouble with that is this.

 

STARC Transaction-Level Modeling (TLM) Guide is the best reference for TLM2 in the web and will answer all of your questions.

 

This is only first 50 pages of the book:

http://depositfiles.com/files/p3jb7k0b7

The whole book is 283 pages.

[amitk3553]

thanks foster911

 

Could u provide me the link of whole book.

 

 

 

Thanks

cam

[foster911]

@amitk3553

I have problem sending pm to you. Please give me an email.

 

 

This book talks about OSCI TLM and OCP TL(recently acquired by Accellera):

Accellera Acquires OCP 3.0 Standard

http://forums.accellera.org/topic/1518-accellera-acquires-ocp-30-standard/

 

There is also a book named "Introduction to Open Core Protocol (OCP)" that would be useful too.

[amitk3553]

@amitk3553

I have problem sending pm to you. Please give me an email.

 

 

This book talks about OSCI TLM and OCP TL(recently acquired by Accellera):

Accellera Acquires OCP 3.0 Standard

http://forums.accellera.org/topic/1518-accellera-acquires-ocp-30-standard/

 

There is also a book named "Introduction to Open Core Protocol (OCP)" that would be useful too.

Here is my email id:

amitk3553@yahoo.com

 

 

Regards

cam