Logger Posted October 27, 2012 Report Share Posted October 27, 2012 Using uvm_reg_sequece the completion model of the interface is abstracted. How do I retain control of deciding whether the register access is executed in a blocking vs non-blocking manner? I want the ability to write a uvm_reg_sequence that can do both types of accesses under user control. -Ryan Quote Link to comment Share on other sites More sharing options...
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