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Posted

Hi,

I read the ubus examples of UVM 1.1 . i don't understand why ubus_base_sequnence bind to ubus_master_sequencer ? since i haven't find where do the action to bind sequence to sequencer ?

does someone knows?

Thanks and best regards

Posted

Hi,

ubus_base_sequence is a virtual base class which is never directly bound to the ubus_master_sequencer. Instead a specific subclass such as the read_modify_write_seq in examples/ubus/integrated/examples/ubus_example_master_seq_lib.sv is bound to the sequencer. You can see an example where read_modify_write_seq is bound to the sequencer in the test_read_modify_write class in examples/ubus/integrated/examples/test_lib.sv. Here the connection is made through the uvm_config_db.

uvm_config_db#(uvm_object_wrapper)::set(this,
		    "ubus_example_tb0.ubus0.masters[0].sequencer.run_phase", 
			       "default_sequence",
				read_modify_write_seq::type_id::get());

There are other ways such as

    seq = read_modify_write_seq::type_id::create("seq");
    uvm_config_db#(uvm_sequence_base)::set(this,
		    "ubus_example_tb0.ubus0.masters[0].sequencer.run_phase", 
			       "default_sequence",
				seq);

or in the run_phase:

    seq = read_modify_write_seq::type_id::create("seq");
    seq.start(ubus_example_tb0.ubus0.masters[0].sequencer);

I hope that this helps.

Best Regards

Peter

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