SeanChou Posted July 23, 2012 Report Share Posted July 23, 2012 Hi UVM Reg Exports, In the uvm_reg_field::do_predict() function as following: • why not clear field_val when (acc == “WSRCâ€) after read? • why not set field_val when (acc == “WCRSâ€) after read? is there some reason or simply missing this type? function void uvm_reg_field::do_predict(….) //…………………… UVM_PREDICT_READ: // line 1136 in uvm_reg_field.svh of uvm-1.1b begin uvm_reg_field_cb_iter cbs = new(this); if (rw.path == UVM_FRONTDOOR || rw.path == UVM_PREDICT) begin string acc = get_access(rw.map); if (acc == "RC" || acc == "WRC" || acc == "W1SRC" || acc == "W0SRC") field_val = 0; // (clear) else if (acc == "RS" || acc == "WRS" || acc == "W1CRS" || acc == "W0CRS") field_val = ('b1 << m_size)-1; // all 1's (set) else if (acc == "WO" || acc == "WOC" || acc == "WOS" || acc == "WO1") return; end Quote Link to comment Share on other sites More sharing options...
SeanChou Posted July 25, 2012 Author Report Share Posted July 25, 2012 Any comment? Quote Link to comment Share on other sites More sharing options...
janick Posted July 25, 2012 Report Share Posted July 25, 2012 (edited) Looks like a bug. See http://www.eda.org/svdb/view.php?id=4268 To help the TSC fix this bug in a timely manner, it would be very valuable if you provided a small SELF-CHECKING testcase. Edited July 25, 2012 by janick Quote Link to comment Share on other sites More sharing options...
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