SeanChou Posted June 27, 2012 Report Share Posted June 27, 2012 Hi UVM exports, We are recently migrating some register tests from VMM to UVM and find UVM adds many new kinds of registers compared with VMM. however, why there are 3 types of registers A0, A1 and RU have been removed? Is it because reigster model does not actually care DUT updates the register value during operation. Thanks! Quote Link to comment Share on other sites More sharing options...
janick Posted June 27, 2012 Report Share Posted June 27, 2012 You can indicate to the register model that the DUT may update the field by declaring it as volatile. A0 = W0S|W1S + is_volatile() A1 = W1C|W0C + is_volatile() RU = RO + is_volatile() Quote Link to comment Share on other sites More sharing options...
SeanChou Posted June 27, 2012 Author Report Share Posted June 27, 2012 Janick, thanks a lot for this anwser. Quote Link to comment Share on other sites More sharing options...
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