Jump to content

[uvm_reg] why A0,A1 and RU VMM RAL types are disappeared in uvm_reg?


Recommended Posts

Hi UVM exports,

We are recently migrating some register tests from VMM to UVM and find UVM adds many new kinds of registers compared with VMM. however, why there are 3 types of registers A0, A1 and RU have been removed?

Is it because reigster model does not actually care DUT updates the register value during operation.

Thanks!

Link to comment
Share on other sites

Join the conversation

You can post now and register later. If you have an account, sign in now to post with your account.
Note: Your post will require moderator approval before it will be visible.

Guest
Reply to this topic...

×   Pasted as rich text.   Paste as plain text instead

  Only 75 emoji are allowed.

×   Your link has been automatically embedded.   Display as a link instead

×   Your previous content has been restored.   Clear editor

×   You cannot paste images directly. Upload or insert images from URL.

×
×
  • Create New...