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Control verification components from sequence


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One way to do this is to add an analysis port to your sequencer. Your sequence can now broadcast an event through the analysis port using:

p_sequencer.<analysis_port_name>.write(<whatever>);

Components that need to detect this event can subscribe to this analysis port.

Edited by phuynh
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One way to do this is to add an analysis port to your sequencer. Your sequence can now broadcast an event through the analysis port using:

p_sequencer.<analysis_port_name>.write(<whatever>);

Components that need to detect this event can subscribe to this analysis port.

Thank you, I didn't know you can do this.

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  • 2 weeks later...

One way to do this is to add an analysis port to your sequencer. Your sequence can now broadcast an event through the analysis port using:

p_sequencer.<analysis_port_name>.write(<whatever>);

Components that need to detect this event can subscribe to this analysis port.

You said "one way to do this". Is there any other ways?

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You said "one way to do this". Is there any other ways?

I think your monitor checking code itself can be made conditional based on a configuration variable in your agent cfg object. You can disable the monitor checking by default, and then when your initialization/configuration sequence is done, your sequence can get the env/agent cfg object and enable the checking.
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