[Modelling 2-bit ADC converter flash]

[lucioct89]

Hello people!

I need to model a 2-bit flash adc converter according to the standard SystemC AMS for a university project.

I have already modeled TDF in the generation part of the analog signal by setting the timestep and all other parameters.

Now the samples of the output voltage from the module TDF end to the input of a module ELN which should represent the circuit, made ​​of resistors, comparators and reference voltage that effect the operation of A / D conversion.

I'm having problems:

1) in shaping the comparators (I use what I find in sc_nullor.cpp and if so, how?)

2) for the reference voltage would like to understand what needs to be defined.

If you have solutions ready for use are welcome!

Thanks in advance!

[maehne]

Hello,

Hello people!

I need to model a 2-bit flash adc converter according to the standard SystemC AMS for a university project.

I have already modeled TDF in the generation part of the analog signal by setting the timestep and all other parameters.

Now the samples of the output voltage from the module TDF end to the input of a module ELN which should represent the circuit, made ​​of resistors, comparators and reference voltage that effect the operation of A / D conversion.

I'm having problems:

1) in shaping the comparators (I use what I find in sc_nullor.cpp and if so, how?)

You cannot directly model the comparator as an ELN module, as this constitutes a nonlinear behavior. The nullor is represents and ideal op-amp with infinite gain and no output limitation. I suggest to use a sca_vsink and a TDF module to implement the comparator.

2) for the reference voltage would like to understand what needs to be defined.

You've to implement the resistor-ladder, which is to be polarized by VDD and VSS at its both ends. Thus, the reference voltages will be available at the nodes between the resistors. The vsink of the comparator will then sense the voltage between the voltage at the ADC input and the reference node. In case of positive voltage, the comparator should output '1' and '0' otherwise.

If you have solutions ready for use are welcome!

We won't do your homework.

Thanks in advance!

Regards,

Torsten

[david.wcc]

I heard there is a ADC for impedance control on DRAM output circuit. Hope the diagram can help...

Impedance calibrations using external resistor

[lucioct89]

Hello Torsten, I built te resistor-ladder and I would like to better understand how to get the value of the voltage of the nodes eln to come in as input to the comparator.

Thanks in advance!

[lucioct89]

Hello Torsten, I built te resistor-ladder and I would like to better understand how to get the value of the voltage of the nodes eln to come in as input to the comparator.

Thanks in advance!

Source Code.zip

[maehne]

Hello,

To sense the voltage at an ELN node, you can use and sca_eln::sca_tdf::sca_vsink. Its p terminal, you would connect to the node in question and its n terminal to ground. The voltage becomes then available at its outp port, which can be connected to a TDF signal. The latter you can then connect to your TDF comparator.

Regards,

Torsten

[sumit_tuwien]

Hello,

I think you have removed a part of your code! - because this will not be acting as a Flash ADC. I see two issues associated with your code- one issue is with syntax and another with methodology. Following are details:

• The basic thumb rule to code using MoC based languages is that you must not mix them. You have used processing() inside SC_MODULE which is not allowed. This is how you will be using it - your signal source is a TDF MoC and resistor ladder is an ELN MoC and again comparator is a TDF MoC. so you will have to separate them in different modules and connect them using converter ports (TDF to ELN converter and ELN to TDF converter). Your module resistor_ladder is a mixture of ELN and TDF syntax which will not work.
  
• The second concern is methodology. You practically do not need to use ELN - even if there is a hard need to mix them then they should be systematic. By the word systematic I mean the ELN modules should be not randomly sandwiched between TDF modules, this will pose limitations on simulation speed. What I can see is that you can really mathematically model the ladder network using TDF MoCs and that is what is expected. Later you might have a need to incorporate comparator input impedance - but that should not be a problem too.
  

I hope I have been able to clarify your confusions. Please let us know if you have questions.

Regards,

Sumit

[dakupoto]

Hello Sir,

I have implemented a thermometer encoder with a 8 bit flash ADC

in the recent past. The comparators are pure TDF modules, and

cannot be sca_eln::sca_nullor because the comparator as used in

a flash ADC consists of an open-loop operational amplifier. The

resistor chain is pure ELN. The final encoder that creates the 8-bit

output, from the comparator outputs is a pure TDF module. All

the modules communicate via converter ports.

Alternatively, as the number of bits is two, may one suggest using

the one-bit DAC (Not-Return-to-Zero) and one-bit ADC (Return-to-

-Zero) in a clever combination ?

[lucioct89]

Hello Torsten, I followed the suggestions of your post, the code attached are the changes I made to the draft code, in which I put the testbench.

Note that I miss to implement the encoder module as TDF, but otherwise things seem to work.

One thing that I would like to ask is what do you advise me to assign values ​​to the elements r1, r2, r3, r4 and give value to the reference voltage vdd, because according to their choice depends on the goodness of the conversion. (even if I was forced to use 2bit output)

Assuming a full scale of 10 volts, 0 to 10V input voltage always positive and I do the following steps to quantize and encode:

Sample value ---> Output Comparator ----> 2bits-output

0 <x <2.5V ---> 000 ----> 00

2.5V <x <5V ---> 001 ---> 01

5V <x <7.5V--> 011 ---> 10

7.5V <x <10V ---> 111 ---> 11

I'm working in the right way or I would recommend to change this pattern?

Thanks in advance

ad_converter.zip

[sumit_tuwien]

Although your question has been addressed to Torsten and since he is busy, I will be glad to take this up. Regarding your question of choice of resistors:

• It should not be so small that the mismatch starts playing a significant role in measurement.
  
• Should not be so large that :
  

• The input impedance of the comparator starts contribute to measurement error (one way is to avoid this to design comparator with very high input impedance - but here you will not have much choice as it will be driving gate of a MOS anyway - keep few hundred MOhms as comparator input impedance when calculating)
  
• The resistor thermal noise starts dominating.
  

Typically resistors of the order few hundred kilo ohms would suffice. I have intentionally avoided component non-linearity and higher order poles in this solution. Please let us know if you have any doubt.

Regards,

Sumit

[lucioct89]

Hello Sumit, while I thank you also for the advice of your previous post,

I made ​​other changes to the code going to complete the encoder and you leave them attached.

At the time I set the 4 resistors 300KOhm, you think it's the right choice?

And one more thing: vdd, the wine and the time of sampling values ​​should I put it?

The vdd must be constant or sinusoidal?

I set the vin as a sinusoidal signal but what values of amplitude and frequency should I set?

Thanks in advance

adc.zip

[sumit_tuwien]

Hello,

This is the case where any sampling frequency will work - simply because everything is idealistic (no bandwidth restriction which comes from comparator). There is no Vdd (apart from the supply voltage of comparator, which you are not considering), this is Vref. Reference voltage is a constant voltage. Vref can be tied with Vdd to increase input swing in some cases.

I see you have beginner's hick-ups. These are very basic questions which you should either study or ask yourself. Do not start modelling anything unless you completely understand it. Please listen to following tutorial on Flash ADC:

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You might want to take advantage from all the videos of this channel. These videos are basically lectures from Indian Institute of Technologies which Govt. of India shares with rest of the world under right to knowledge act.

Regards,

Sumit

[sumit_tuwien]

Alternatively you might want to visit the mother site :

http://nptel.iitm.ac.in/

[lucioct89]

Sumit, I'll know that I just found out that I had the problem of vref misconfigured, now setting the offset to 0V and amplitude to 10V things work, and I can read voltages at nodes 7.5V, 5V, 2.5V, which are those that should be compared in comparators as I wanted ...thanks for the references certainly give him a look!