How to interpret 'external' register type

[Taichi Ishitani]

Hi,

I'm developing CSR generation tool named RgGen and planing to IP-XACT generation.
https://github.com/rggen/rggen

RgGen supports the 'external' register type. An address range described as an external register is connected to other CSR block.

For this exmaple, 'register_17' (address range: 0x80 - 0xFF) is an external register and this range is connected to other CSR block.

When generating IP-XACT, it's unknown which CSR block will be connected to this range.
How should I interpret this case into IP-XACT?

Regards,
Taichi Ishitani

[kock]

Hi Taichi,

If I understand you well, this can be described in an IP-XACT component as follows. Such a component has a memory map with an address block that describes internal registers. In addition the memory map needs a subspace map that references an initiator interface. The address space referenced by that initiator interface represents the external registers space. Here is the description:

<?xml version="1.0" encoding="UTF-8"?>
<ipxact:component xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2022" xsi:schemaLocation="http://www.accellera.org/XMLSchema/IPXACT/1685-2022 http://www.accellera.org/XMLSchema/IPXACT/1685-2022/index.xsd">
	<ipxact:vendor>accellera.org</ipxact:vendor>
	<ipxact:library>forum</ipxact:library>
	<ipxact:name>external_register</ipxact:name>
	<ipxact:version>1.0</ipxact:version>
	<ipxact:busInterfaces>
		<ipxact:busInterface>
			<ipxact:name>T</ipxact:name>
			<ipxact:busType vendor="v" library="l" name="n" version="v"/>
			<ipxact:target>
				<ipxact:memoryMapRef memoryMapRef="MM"/>
			</ipxact:target>
		</ipxact:busInterface>
		<ipxact:busInterface>
			<ipxact:name>I</ipxact:name>
			<ipxact:busType vendor="v" library="l" name="n" version="v"/>
			<ipxact:initiator>
				<ipxact:addressSpaceRef addressSpaceRef="AS"/>
			</ipxact:initiator>
		</ipxact:busInterface>
	</ipxact:busInterfaces>
	<ipxact:addressSpaces>
		<ipxact:addressSpace>
			<ipxact:name>AS</ipxact:name>
			<ipxact:range>'h80</ipxact:range>
			<ipxact:width>32</ipxact:width>
		</ipxact:addressSpace>
	</ipxact:addressSpaces>
	<ipxact:memoryMaps>
		<ipxact:memoryMap>
			<ipxact:name>MM</ipxact:name>
			<ipxact:addressBlock>
				<ipxact:name>internalRegisters</ipxact:name>
				<ipxact:baseAddress>'h0</ipxact:baseAddress>
				<ipxact:range>'h80</ipxact:range>
				<ipxact:width>32</ipxact:width>
			</ipxact:addressBlock>
			<ipxact:subspaceMap initiatorRef="I">
				<ipxact:name>SM</ipxact:name>
				<ipxact:baseAddress>'h80</ipxact:baseAddress>
			</ipxact:subspaceMap>
		</ipxact:memoryMap>
	</ipxact:memoryMaps>
</ipxact:component>

If you instantiate this component in an IP-XACT design and connect bus interface I to another component instance, then the memory map (containing the external registers) referenced by the connected target interface is mapped into the address space AS. In this way, from target interface T, the internal registers are accessed at offsets 'h0 -'h7F and the external registers are accessed at offsets 'h80 - 'hFF.

Best regards,
Erwin  

[Taichi Ishitani]

Thank you for your advice, Erwin.

I have an additional question.
Can I use this way in the case that the external address range is in the middle of internal registers range?
For example:

• register_a
  • address: 0x0
  • internal register
• register_b
  • address: 0x10 - 0x1F
  • external register
• register_c
  • address: 0x20
  • internal register

These registers (regsiter_a, register_b and register_c) are in the same CSR block.
For this case, do I need to split the memoryMap into 3 address range like below?

• addressBlock: 0x00 - 0x0F
  • containing register_a
• subspaceMap: 0x10 - 0x1F
  • containing register_b
• addressBlock: 0x20 -
  • containing register_c

Regards,
Taichi Ishitani

[kock]

Hi Taichi,

There is no semantic consistency rule that an address space (or address space segment) that is mapped a subspace map into a memory cannot overlap with an address block. However, an address block does represent a "contiguous" piece of memory so in my opinion it would a good practice to split the address block.

Best regards,
Erwin

[Taichi Ishitani]

Hi Erwin,

On 2/16/2024 at 7:52 PM, kock said:

However, an address block does represent a "contiguous" piece of memory so in my opinion it would a good practice to split the address block.

Yes, I understood. However splitting the memory map would make the generator complex so I'd like to define an addressBlock and a subspaceMap like below.

• addressBlock: 0x00 - 
  • containing register_a and register_c
• subspaceMap: 0x10 - 0x20
  • containing register_b

Quote

There is no semantic consistency rule that an address space (or address space segment) that is mapped a subspace map into a memory cannot overlap with an address block.

From this comment, I think this allocation is also valid allocation. Is my understanding is correct?

Regards,
Taichi Ishitani