controlling field for bus transaction from reg sequence

[verifier]

Hi

what is the best way of controlling bus transaction related fields which are not available in reg sequence.

for example register access to a particular register can be secure/unsecure and previleged/unprevileged.

I would like to control these transaction field from reg sequence, what is the best of doing it ?

Thanks

Verifier

[uwes]

hi,

the path would be to define a new object deriving from uvm_object holding the additional properties. a configured instance can then be passed via the <uvm_reg>.write/read/update/mirror function in the "extension" argument. in the reg-to-bus adapter.reg2bus() translation stage you can refer to the passed object as "get_item().extension" and you can adjust the properties of your low level sequence.

[verifier]

Hi Uwe,

thanks for the reply.

I am able to do it.

verifier