Yash Posted July 2, 2022 Report Share Posted July 2, 2022 Hello, To debug the bindings between various signals, ports and interfaces connections, is there a way to display the binding information? Consider the following example: // https://www.edaplayground.com/x/JZsM #include <systemc> using namespace sc_core; SC_MODULE(InternalCounter) { sc_in_clk clock{"clock"}; sc_in<bool> enable{"enable"}; SC_CTOR(InternalCounter){}; }; SC_MODULE (Counter) { sc_in_clk clock{"clock"}; sc_in<bool> reset{"reset"}; sc_in<bool> enable{"enable"}; InternalCounter ic{"ic"}; SC_CTOR(Counter){ ic.clock(clock); ic.enable(enable); } }; SC_MODULE (CounterDriver) { sc_clock clk_s {"clk_s"}; sc_out<bool> reset{"reset"}; sc_out<bool> enable{"enable"}; SC_CTOR(CounterDriver){} }; SC_MODULE(Top) { sc_signal<bool, SC_MANY_WRITERS> reset_s{"reset_s"}; sc_signal<bool> enable_s{"enable_s"}; Counter c {"c"}; CounterDriver cd{"cd"}; SC_CTOR(Top) { c.clock(cd.clk_s); c.reset(reset_s); cd.reset(reset_s); c.enable(enable_s); cd.enable(enable_s); } }; int sc_main(int argc, char**argv) { Top top("top"); sc_start(1, SC_NS); // print_connectivity(top); return 0; } What I would want is a function like print_connectivity below which prints the following. Signal Connectivity top.cd.clk_s:: top.c.clock -> top.c.ic.clock top.reset_s:: top.cd.reset -> top.c.reset top.enable_s:: top.cd.enable -> top.c.enable -> top.c.ic.enable Quote Link to comment Share on other sites More sharing options...
Yash Posted July 5, 2022 Author Report Share Posted July 5, 2022 Can this function exist Or do Ineed to change the SystemC Kernel What I found was the class sc_port_registry which has both insert and remove function. It seems that once the connections have been binded, the entries in sc_port_registry get removed https://github.com/systemc/systemc-2.3/blob/master/src/sysc/communication/sc_port.h#L189 Quote Link to comment Share on other sites More sharing options...
Eyck Posted August 1, 2022 Report Share Posted August 1, 2022 Actually you would have to look at the interfaces being bound to a port. This would give you an indication which port is bound to which interface/signal. Such a apporach is used to visualize the design hierarchy in the hierarchy_dumper of the SystemC Components Library which generates some text format usable with the Eclipse Layout Kernel algorithms (e.g. at https://rtsys.informatik.uni-kiel.de/elklive/elkgraph.html) Quote Link to comment Share on other sites More sharing options...
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