mwhite_cp Posted March 27, 2012 Report Share Posted March 27, 2012 I am trying to do backdoor access to an internal memory but the tool generated errors because hdl_path is not correct for the memory model and it can't find the memory array index. I am using a memory library provided by Xilinx. Could UVM perform backdoor access to the Xilinx or vendor generated Verilog memory model? Thanks! Quote Link to comment Share on other sites More sharing options...
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