Dina Emadeldin Posted October 16, 2020 Report Share Posted October 16, 2020 I want to verify register file content through assertion in bind module , In bind statement I use : target_module bind_target_instance bind_instansiation (.*); to include all target module scope contents but when I searched for what should be the translation of that be in the bind module, I find an example for a FIFO module in the example the bind module translate all input ,output and internal vectors and signals to input to the bind module but he no information about the memory array was included , how can we access the memory or register file contents if we want to check specific behavior on it. Second as I know the parameters in the design we can't bind the information in it , if we have localparam in the design ,do we need to write these localparams again in the bind module Quote Link to comment Share on other sites More sharing options...
chr_sue Posted October 21, 2020 Report Share Posted October 21, 2020 Could you please explain what you mean saying 'verify register file content through assertion'. What is 'register file content'? Assertions are used to verify dynamic behavior. What you are sayying sounds static. Quote Link to comment Share on other sites More sharing options...
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