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SystemC code running with testbench

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I am trying to run a basic systemc code which checks for the value of a given input and monitors the result. For future process of development (which might turn into a complex project), I want to execute the dut using my testbench file. I have attached the codes and the terminal output. The code is not able to pick up the correct integers or even the sc_timestamp() value.  Since everything is attached, please have a look and suggest solutions.



systemc codes


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Well, there are several problems in your code:

  • naming and sc_out input is counterintuitive - but this is minor
  • you use a limited range integer and assign values outside this range. sc_in<2> is a 2.bit integer and can hold values from -2 to 1.
  • it seems you did not understand and obey event scheduling, more see below

So what you see in line 16-22 of the output is the initial invocation of tb::source(), tb::sink(), and statem::controller(). There tb::source() writes 11 to input_sig and statem::controller() write enable=false. Due to the write to input_sig tb::source(), tb::sink(), and statem::controller() get invoked again (the are sensitive to the value_changed event) as the output line 23-29 show. tb::sink() now writes the same value to input_sig again but this does not trigger any value_changed event. Since no process is sensitive to enable and no other events are left over the simulation kernel stops the simulation. As there is now wait statement in your model you do not see any time advancing, everything happens at time 0 (but in different delta cycles).

To my experience you should use SC_THREAD when you have an active component (tb in your case), here you can easily implement an implicit statemachine and advance time. Since SC_METHODs are not allowed to block (call wait()) they are more suited to reacting components.

If you describe the intention I can provide you an example on how to do this.

Best regards


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