Roman Popov Posted May 25, 2017 Report Share Posted May 25, 2017 Hello, I need to port following code from Verilog to SystemC: assign #DELAY out = in; What is the best known method to do this in SystemC? Similar question on stackoverlow https://stackoverflow.com/questions/5566785/specifying-signal-delays-in-systemc-as-clause-after-in-vhdl Quote Link to comment Share on other sites More sharing options...
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