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real port mappping

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Hi all,

i'm tryin to make a SV code with the following bloks:

-Gaussian nois generator: the output is 16 bit, but i had converted it to real ( i had just putted real in place of STD_logic)

-Low pass filter input real, output real

=> the verification of the two bloks are OK

-sigma delta modulator, input Real, Output bit


the guassiaan block+low pass+SDM fail, 

i  tryed to simulate the SDM+gaussian block but it does not work, I'm using ModelSim 101c

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