SeanChou Posted October 4, 2011 Report Share Posted October 4, 2011 Hi, exports, uvm1.1 class reference illustrate the "best effort" access in uvm_reg filed write (front door). If a front-door access is used, and if the field is the only field in a byte lane and if the physical interface corresponding to the address map used to access the field support byte-enabling, then only the field is written. however, my test does not work. a 32-bit reg reg32 contains 4 fields byte0, byte1, byte2, byte3. my code: reg32_inst.byte0_inst.write(status, 0x88); then the adaptor still recevie the below uvm_reg_bus_op d= 0x0000_0088 nbits = 32 byte_enable = 0x1111 (expected to be 0x0001) Any hint for debuging this? thank you very much! Quote Link to comment Share on other sites More sharing options...
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