SeanChou Posted October 4, 2011 Report Share Posted October 4, 2011 Hi UVM exports, I am pacthing some functional coverage hole of register bus access type, and encounter the following problem about uvm_reg, hope some of you could give me some hint how to handle this without writing some other test bypass uvm_reg and thanks! Assume there is a 32-bit register with fileds byte0, 1, 2, 3 and connected with a bus BFM whose protocol supports byte, halfword and word access. when read we are able to hint the BFM which type of access we will use for example: reg_byte0.set(5); reg.update(); // byte access reg_byte0.set(3); reg_byte1.set(4); reg.update(); // half word access is there similar behavior that we could follow when read access? Quote Link to comment Share on other sites More sharing options...
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