Hongnhattl Posted July 18, 2015 Report Share Posted July 18, 2015 Hi all, I'm doing verification for an PHY between SPI master and a memory chip. I make two agents one for master to transfer the request, one mimics the memory slave to reply. PHY will be hooked up to two interfaces that of SPI Master and Memory. During sending request and reply data, Chip Select Pin (in SPI interface) must go low to enable the transaction. But I don't know how to control this pin when It sends the reply from memory. Because this pin is not an interface of memory slave agent. Could anyone give me some advice? Could I use phases to control the env that has different agents? Thank you, Nhat Quote Link to comment Share on other sites More sharing options...
karandeep963 Posted January 8, 2016 Report Share Posted January 8, 2016 As far as I understand Chip Select(CSbar) is active low in nature , so its the masters responsibility to control/enable/disable it while the slave has to respond to the command input. Slave must not drive CSbar. Slave must be active on CSbar low and process the input command and do the needful. Quote Link to comment Share on other sites More sharing options...
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