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Mapping relationship between Design Patterns and UVM

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Hi OO experts,

Today I am trying to list some mapping relationship between GOF design patterns and UVM.

I hope this table could help some people who knows either design patterns or UVM to have quick idea about anohter thing.

hope some could help to list more examples or correct my mistakes. Thanks!

Abstract Factory - ?

Builder - uvm_component

Factory Method - UVM Factory

Prototype VMM Factory

Singleton uvm_*_pool

Adapter uvm_reg_adapter

Bridge uvm_driver and uvm_sequencer

Composite uvm_sequence_lib and uvm_sequence

Decorator - ?

Facade - ?

Flyweight - insignificant ?

Proxy - insignificant ?

Chain of Responsibility -?

Command - uvm_sequence_item

Interpreter - insignificant ?

Iterator - ?

Mediator - virtual sequencer

Memnto - insignificant?

Observer uvm_monitor

State - uvm_phase ?

Strategy - uvm_sequence

Template Method - uvm_phase

Visitor - ?

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