scnix1 Posted May 25, 2011 Report Posted May 25, 2011 I see where raising objections via uvm_test_done is deprecated, yet I don't see any other way to effectively raise them from a sequence as it does not have a run_phase() task defined. I tried using starting_phase, but it is null. Apparently this is a known issue: http://www.eda.org/svdb/bug_view_page.php?bug_id=3419&history=1 Thanks, Scott Nixon Quote
uwes Posted May 26, 2011 Report Posted May 26, 2011 hi, starting_phase is not set if you start a sequence manually via someseq.start(). but you are free to add the assignment to starting_phase there as well... this might help but gets complicated in case of sequences spawning over phases or multiple encapsulated .start()-ed sequences. // Variable: starting_phase // // If non-null, specifies the phase in which this sequence was started. // The ~starting_phase~ is set automatically when this sequence is // started as the default sequence. See // <uvm_sequencer_base::start_phase_sequence>. actually the issue goes deeper, a component is executing a set! of phases at the same time (simple example run+post_main). therefore if a sequence is started at some point in time it is upto the end user to specify which phase was starting the sequence. there was a discussion in the TSC about that topic as you saw but a proper solution was defered to a later release. /uwe Quote
scnix1 Posted May 26, 2011 Author Report Posted May 26, 2011 OK, thanks. So what is the currently recommended procedure for raising objections from sequences? Scott Nixon Quote
uwes Posted May 27, 2011 Report Posted May 27, 2011 hi, the simple model is: 1. start your sequences automatically via the phase hooks 2. if you use seq.start() and expect the sequences to bject phase progression make sure you set the seq.starting_phase appropriate 3. for sequences objecting phase progression make a derived class like the following and use it as base for active sequences virtual class uvm_active_sequence #(type REQ=int,RSP=REQ) extends uvm_sequence#(REQ,RSP); virtual task pre_body(); if(starting_phase) starting_phase.raise_objection(this, "master seq active"); endtask virtual task post_body(); if(starting_phase) starting_phase.drop_objection(this, "master seq inactive"); endtask function new(string name ="uvm_active_sequence"); super.new(name); endfunction endclass if you have a more advanced model with sequences spawning phases and sequences acitvely starting other sequences which do require access to the phasing system you probably need a hand crafted solution depending upon your exact requirements. /uwe Quote
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