Muds Posted February 24, 2011 Report Share Posted February 24, 2011 Hi, We have a testbench in System Verilog which is uRM based. Please let me know if UVM supports module based metholdology? Is possible to convert from uRM to UVM with minimal changes?. Thanks Muds. Quote Link to comment Share on other sites More sharing options...
jadec Posted February 28, 2011 Report Share Posted February 28, 2011 UVM does not have direct support for deprecated methodologies from OVM. The conversion from URM to UVM looks relatively straight-forward. It might also be possible to convert the compatibility library from OVM to UVM. In either case, there may be some subtle differences in behavior. Quote Link to comment Share on other sites More sharing options...
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