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Folks, I am new here, so please bear with me if this has been asked before ...

May I know how an user like me can influence or contribute to UVM development/definition?

For example, sometime back I brought up a topic at OVM and they said that such a thing is being taken care by UVM.

Looking at Accelera, I could not make out head and tail as to how the standardization is driven, and who can or cannot contribute.

Regards,

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Folks, I am new here, so please bear with me if this has been asked before ...

May I know how an user like me can influence or contribute to UVM development/definition?

For example, sometime back I brought up a topic at OVM and they said that such a thing is being taken care by UVM.

Looking at Accelera, I could not make out head and tail as to how the standardization is driven, and who can or cannot contribute.

Regards,

First step would be to subsrcibe to accellera-UVM list and be a silent observer - perhaps you are already doing that.

Of-course you have good ideas - feel free to share them on forums like this.

Then start interacting with local DV groups such as DVClub (www.dvclub.org). Recently we are also initiating IEEE-SA activities in India and it will be great to have folks like you to contribute there. Contact me offline svenka3 @ gmail if you need more details.

Regards

Srini

www.cvcblr.com/blog

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First step would be to subsrcibe to accellera-UVM list and be a silent observer - perhaps you are already doing that.

Thank you but I don't seem to find any group related to UVM standardization.

All I can see are: Interface Technical Committee, Unified Coverage Interoperability Standard, VHDL Technical Committee, Verification IP Technical Committee, Verilog-AMS.

Any comments?

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