christian-gab.fraisse Posted November 26, 2013 Report Share Posted November 26, 2013 Hello, I would like to describe a complex register. each register is spaced of 0x10 The register is of 4 bytes width and is seen at different address for different operations. ie : register address + 0x0 -> replace whole register register address + 0x4 -> set bits where set register address + 0x8 -> reset bits where set register address + 0xC -> toggle bits where set Initially I was to use 3 alternate registers per register, but addressOffset is not element of alternate register. Only access may be different. So I have to add VendorExtension for addressOffset. Another way could be to use the dim element to repeat the register 3 times. Also here, the register is the same in its behaviour. There could be also bank usage with parallele bank alignment usage, but here, there is duplication of the registers description, that is not convenient. I would like to describe a maximum of information into the register to reflect the correct behaviour, and if possible not duplicating each register 4 times. Any suggestion is welcome. Thanks Quote Link to comment Share on other sites More sharing options...
Richard Weber Posted January 23, 2014 Report Share Posted January 23, 2014 Hello Christian, The feature you are describing is register aliasing. The is not supported by IEEE 1685-2009. It is supported by Accellera SystemRDL 1.0 2009. I would recommend that you have the four registers containing the fields with the appropriate access and modifiedWriteValue. The fact that there is only one physical register is currently beyond IP-XACT. You can either make a note of this in the description or add vendor extensions to document the relationship. Quote Link to comment Share on other sites More sharing options...
nbjessen Posted March 14, 2014 Report Share Posted March 14, 2014 Hi, where could I find the plans to merge SystemRDL with IP-XACT? Quote Link to comment Share on other sites More sharing options...
Richard Weber Posted March 14, 2014 Report Share Posted March 14, 2014 I am a member of both the IP-XACT and SystemRDL committees. The committees are going in different directions with regard to the data model. IP-XACT documents the interfaces of a design, avoids behavior, and is a communication format for tools. SystemRDL is all about register hardware and software behavior, and, it is meant as a human design capture format. The SystemRDL committee is in the process of attempting to add those features of IP-XACT 2009 which are not in SystemRDL 1.0. Quote Link to comment Share on other sites More sharing options...
balasubramanian.g@pmcs.com Posted August 13, 2014 Report Share Posted August 13, 2014 We also found that SystemRDL is not supported by Cadence toolsets. Need for accellera to merge systemRDL into IP-XACT standard. Quote Link to comment Share on other sites More sharing options...
Richard Weber Posted August 13, 2014 Report Share Posted August 13, 2014 Hello Balasubramamian,The industry supports SystemRDL. The Semifore CSRCompiler is the reference platform for the Accellera SystemRDL 1.0 standard and has been supporting the various versions of SystemRDL since 2007. Semifore is a contributing member of the current active Accellera SystemRDL standards committee. FULL DISCLOSURE: I work for Semifore, Inc. Quote Link to comment Share on other sites More sharing options...
Recommended Posts
Join the conversation
You can post now and register later. If you have an account, sign in now to post with your account.
Note: Your post will require moderator approval before it will be visible.