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I did not worked on OVM or VMM.

How different is it from OVM and VMM?

now there is one more methodology came into picture. What are the benefits of the new methodology (UVM) apart from OVM and VMM.

Is is possible to start UVM directly without any prior knowledge of OVM/VMM?

Thanks & Regards,


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Hi Arjun,

Here is a cut & paste from the release notes:

The UVM is built on the same code base as OVM-2.1.1, with the following

new feature enhancements which are described in greater detail in the

"New Features" section below and any API changes described in the

"API Changes" section.

- All ovm_* symbols converted to uvm_*.

- Enhancements to the OVM callback facility, including a new message

catching facility. These enhancements introduce some minor backward

incompatibilities to the OVM callback facility.

- Enhancements to the OVM objection mechanism. These enhancements

introduce some minor backward incompatibilities to the OVM objection


Also the deprecated features of OVM has been removed in UVM.

So if you don't have prior experience in OVM/VMM, you don't have to worry, the UVM User Guide should help you get started on UVM.

Good Luck!


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Hi Arjun,

A pre-requisite for OVM/VMM/UVM will be solid SystemVerilog skill-set. Having trained atleast 300 engineers (don't have exact count) on these - some tend to take a short cut into a methodology without knowing the proper syntax. I strongly recommend you become SV aware and then attack any methodology.

Having said that, you can directly start off with UVM - and infact that's preferred as of now - given all major EDA vendors openly support/embrace it. We are aware of 4 EDA tools supporting UVM as of now (3 major ones and recently Aldec's Riviera-Pro).

We are soon launching our UVM trainings as well. So stay tuned. If you are in Bangalore and interested on a free high level overview of UVM, feel free to register @ www.tinyurl.com/cvc-sv-uvm




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