santhoshvlsi Posted June 14, 2013 Report Posted June 14, 2013 Hi all, I have 16 bit data line and in transaction class i declared as "rand".But i want even even number's in one transaction and odd no number's in another transaction. Please suggests me.. Regards,Santhosh. Quote
fbochud Posted June 14, 2013 Report Posted June 14, 2013 You could use a toggle bit in your sequence and use it to set up the constraint: toggle_bit = ~toggle_bit; `uvm_do_with(req, {req.data[0]== toggle_bit;}) Regards Florian Quote
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