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Posted

Could some SystemC guru please shed some light on this ?

How could I make feedback loops work in SystemC ?

Consider the simple JK flip-flop in the attachment. If for each

of the NAND gates, I try to print out the time stamp at which

the output is changing, I always get a 0. But the circuit is driven

by a clock, so why does the time stamp not change ? The

code compiles and runs in an infinite loop, and completely

ignores the clock. Any hints, suggestions would be immensely

helpful.

post-157-0-36002700-1361205008.png

Posted

I'm not convinced, that SystemC is the language of choice for gate-level models.

It's hard to tell what went wrong in your model without seeing the code (especially the process declarations and definitions) of the NANDs and their composition.

Two short recommendations:

  • Instead of printing out values, you should consider to trace the signals to a proper trace file.
  • You may need to prevent the "forbidden" state in your flip-flop by adding "dont_initialize();" to some of your processes.

/Philipp

Posted

Dear dakupoto,

There is a feedback which does not have delays and hence there is a change in timestep, but that is very small. This is what you are seeing. In verilog also this will be a problem unless you use some delay at gate outputs (use some wait statement at the output of every NAND gate, which will obviously come from the transistors which will be used to implement your gates).

Regards,

Sumit

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