carningli Posted January 15, 2013 Report Share Posted January 15, 2013 I have started a sequence using the "default_sequence", the sequence is running background traffic and has been set up to deliberately run continuously using a forever loop. The problem I have is that the sequence raises an objection at start up, through if (starting_phase!=null) begin starting_phase.raise_objection(this); Is it possible to get the default sequence I have chosen to run to drop this objection, as this sequencer is only running background traffic, and it is the sequences that run on other sequencers that should control the finishing of the test. Quote Link to comment Share on other sites More sharing options...
dwikle Posted January 16, 2013 Report Share Posted January 16, 2013 If you can modify the sequence, you can add a field to control whether or not to raise objections. Then don't raise objections at all in sequences which run forever loops.As an example, this is from a base sequence class for a component: // Field to control whether objection should be raised. This can be set to // zero by free-running sequences (those which contain foverer loops). bit enable_objection = 1; // Automatically raise/drop objections virtual task pre_body(); if (starting_phase != null && enable_objection) begin starting_phase.raise_objection(this, {get_type_name(), " pre_body"}); end endtask virtual task post_body(); if (starting_phase != null && enable_objection) begin starting_phase.drop_objection(this, {get_type_name(), " post_body"}); end endtask Quote Link to comment Share on other sites More sharing options...
carningli Posted January 19, 2013 Author Report Share Posted January 19, 2013 For further understanding of the way UVM works (as I'm a new adopter) why can't you drop the objection in the body of the sequence? Is this just a convention or it it not possible. I ask as I have set up a base sequence that does the raising and dropping of objection, the sequence that has the forever loop just extends this and only has a body. I can see your code idea will still work, but for further understanding of UVM I wondered why I could just not drop the objection in the extended sequence body task. Quote Link to comment Share on other sites More sharing options...
uwes Posted January 21, 2013 Report Share Posted January 21, 2013 hi, >For further understanding of the way UVM works (as I'm a new adopter) why can't you drop the objection in the body of the sequence? Is this just a convention or it it not possible. you can at any time raise and drop an objection. basically raise+drop should encapsulate behaviour which should not be interrupted (through end of test or end of phase). so its perfectly legal to raise at any time (if you did not before the phase/test could have ended before) and its legal to drop at any time (but you have to be aware that with the drop the test/phase ends without the rest of your functionality running >I ask as I have set up a base sequence that does the raising and dropping of objection, the sequence that has the forever loop just extends this and only has a body. you put the raise+drop in the base sequence so you dont have to write that piece of code in a derived class. raise+drop should only be done for self-active sequences (and not for slaves, nor reactive sequences, nor background sequences) >I can see your code idea will still work, but for further understanding of UVM I wondered why I could just not drop the objection in the extended sequence body task. if you would drop in the body() you could not use your sequence as subsequence anymore (because it drops the objection in the subseq and therefore eventually ends the phase/test). you typically want raise+drop on the outermost level of code which should should complete entirely. Quote Link to comment Share on other sites More sharing options...
carningli Posted January 21, 2013 Author Report Share Posted January 21, 2013 Hi UWES, Thanks for your response, it was very helpful In your response you say 'raise+drop should only be done for self-active sequences (and not for slaves, nor reactive sequences, nor background sequences)' Is there a prescribed UVM way for handling background sequences, which has not been discussed so far in this thread? I have before started the background sequence manually on the sequencer via my virtual sequencer which runs all the sequences that run on all sequencers in the tb. (Hope this makes sense!) This means that for every new sequence created for the virtual sequencer you must remember start the background traffic. I have wasted enough time debugging other engineers sequences where they have forgotten to do this, so for this port where it runs background traffic 99% of the time I would prefer to have a self activating sequence to produce the background traffic. So far I have concluded that the background sequence can be started as a default sequence, but to prevent it raising an objection I must either modify the base sequence as per dwikle suggestion if (starting_phase != null && enable_objection) or I could drop the objection in the background sequence with the consequence of not using the sequence as subsequence any more, (which is not that much of a problem for this sequence) Thanks for your input Quote Link to comment Share on other sites More sharing options...
uwes Posted January 22, 2013 Report Share Posted January 22, 2013 hi, only sequences which you want to run entirely (they start AND end) should be protected using raise+drop. all others (slaves,background, reactive(interrupt)) should not raise objections. if you start a sequence as background you should make sure that it uses raise+drop and it has a chance to end (no forever) or you dont raise+drop and you can use forever (and they dont need to finish). Quote Link to comment Share on other sites More sharing options...
carningli Posted January 22, 2013 Author Report Share Posted January 22, 2013 thank you for you help Quote Link to comment Share on other sites More sharing options...
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