The problem about uvm_reg_block

[mrforever]

Hi, all

I am running into such a problem. I have two user-defined reg sequences(reg_seq_a and reg_seq_ which both include the user-defined reg block(my_reg_block). I do such works

1) Instantiate my_reg_block in env to avoid instantiating my_reg_block twice if it is instantiated in reg_seq_a and reg_seq_b.

2) Then, assign my_reg_block to model of reg_seq_a.

3) After that, I use $cast() function to assign model to handle of my_reg_block which locates in reg_seq_a.

4) At last, I use write_reg() function to generate the reg sequences in body() of reg_seq_a.

5) Do 2)-4) steps with reg_seq_b.

But VCS reports such an error.

The object at dereference depth 1 is being used before it was

constructed/allocated.

Please make sure that the object is allocated before using it.

These are the codes:

file1:

class my_env extends uvm_env;

my_reg_block reg_block_x;

...

function void build_phase(uvm_phase phase);

...

if(reg_block_x == null) begin

$display("create reg_block_x!!!");

reg_block_x = my_reg_block_x::type_id::create("reg_block_x",,get_full_name());

reg_block_x.build();

reg_block_x.lock_model();

...

end

...

endfunction : build_phase

function void connect_phase(uvm_phase phase);

...

if(reg_block_x.get_parent() == null) begin

reg_block_x.default_map.set_sequencer(cfg_agt.cfg_sqr, reg2axi);

reg_block_x.default_map.set_auto_predict(1);

...

end

...

endfunction : connect_phase

endclass : my_env

file2:

class test extends uvm_test;

my_env env;

my_config_sequence cfg_seq;

...

virtual function void build_phase(uvm_phase phase);

env = my_env::type_id::create("env", this);

cfg_seq = my_config_sequence::type_id::create("cfg_seq", this);

super.build_phase(phase);

endfunction : build_phase

function void connect_phase(uvm_phase phase);

super.connect_phase(phase);

$display("assign reg_block_x to model");

cfg_seq.r_seq_a.model = env.reg_block_x;

cfg_seq.r_seq_b.model = env.reg_block_x;

...

endfunction : connect_phase

task run_phase(uvm_phase phase);

cfg_seq.starting_phase = phase;

cfg_seq.start(env.cfg_agt.cfg_sqr);

...

endtask : run_phase

endclass : test

file3:

class reg_seq_a extends uvm_reg_sequence;

my_reg_block reg_block_x;

...

virtual task pre_start();

$cast(reg_block_x, model);

if ($cast(reg_block_x, model)) begin

$display("assign model to reg_block_x successfully!");

end

else begin

$display("cann't assign model to reg_block_x!");

end

endtask: pre_start

virtual task body();

...

write_reg(reg_block_x.R, status, data);

...

endtask: body

endclass: reg_seq_a

file4:

class reg_seq_b extends uvm_reg_sequence;

my_reg_block reg_block_x;

...

virtual task pre_start();

$cast(reg_block_x, model);

if ($cast(reg_block_x, model)) begin

$display("assign model to reg_block_x successfully!");

end

else begin

$display("cann't assign model to reg_block_x!");

end

endtask: pre_start

virtual task body();

...

write_reg(reg_block_x.R, status, data);

...

endtask: body

endclass: reg_seq_b

file5:

class my_config_sequence extends uvm_reg_sequence;

reg_seq_a r_seq_a;

reg_seq_b r_seq_b;

...

virtual task body();

...

`uvm_do(r_seq_a);

`uvm_do(r_seq_;

...

endtask: body

endclass: my_config_sequence

When I run these codes, it can display "create reg_block_x!!!" and "assign reg_block_x to model", but cann't display the information in pre_start() of file3 and file4. Just reports object reg_block_x is null. It seems that the pre_start() task in file3 and file4 desn't execute successfully.

But the `uvm_do(sub_seq) should have called such functions and tasks in order.

`uvm_create(sub_seq)

sub_seq.randomize()

sub_seq.pre_start() (task)

this.pre_do(0) (task)

this.mid_do(sub_seq) (func)

sub_seq.body() (task)

this.post_do(sub_seq) (func)

sub_seq.post_start() (task)

I think pre_start() task should have executed successfully. It should display the information about $cast. But it doesn't. Can anybody tell me why?

Thanks in advance.

Best Regards

mrforever

Edited January 6, 2013 by mrforever

[mrforever]

I have added the option +UVM_PHASE_TRACE to debug, finding that the information of pre_start() task can be displayed. And I find that the reg_block_x handle is null in pre_start() task. It implies that $cast() function has returned 1 but doesn't assign model to reg_block_x successfully. Maybe I understand the $cast() function wrongly? Did any body run into the same problem?

Edited January 6, 2013 by mrforever

[mrforever]

Hi, all

I have found out the problem now. When I added the option +UVM_PHASE_TRACE and some display information. I have found that cfg_seq.r_seq_a.model was not null in file2, but the model(before cast) was null in file3 and file4. This causes that reg_block_x is null. But the connect_phase() function in file2 is ahead of pre_start() task in file3 and file4 at the simulation time. In my opinion, the model should not be null in file3 and file4 if cfg_seq.r_seq_a.model isn't null. Could anybody give me some clue?

Thanks very much.

Edited January 6, 2013 by mrforever

[Kathir]

Could you please provide the solution if you had fixed it..