dudi Posted June 28, 2012 Report Share Posted June 28, 2012 Hi all I'm trying create a simple mechanism for checking the functionality of a DUT with CRC, that maybe can also be used to other scenarios that require forcing a signal. What do you think is the best approach in order to create a reusable environment? I'm thinking of 2 ways to achieve this: 1) using the "uvm_hdl_force" function - forcing the signal through VPI. The benefits are it is very simple, and and it can be reusable if you use the config_db to pass the sting type hdl path. 2) using a virtual interface - This approach requires more code, but you can have better performances in runtimes (vpi requires special compilation flags) Do you have other suggestions? Which do you think is better? Thanks a lot! Dudi Quote Link to comment Share on other sites More sharing options...
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