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alternative register with select file to switch the registers


Dako

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Hi Dako,

The typical way to describe that is to use an alternate register. You describe the first register as a normal register. In that register, you can describe the second register as an alternate register. The alternate register has the same offset and size. The alternate register also requires an alternate group. The "selection" of that alternate group cannot be described in 1685-2014. In the new version 1685-2022, the concept of alternate group has been replaced by mode. The mode conditions enables you to describe that the mode is selected depending on the content of another register field or on the value of a port.

Best regards,
Erwin

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  • 3 weeks later...

@Dako Just to build on @kock's answer, 1685-2022 modes are complicated, but incredibly powerful. Since alternateRegisters are now mode-dependent, you can specify define a dynamic (unresolved) condition under which an alternateRegister description is the one to use. Some pseudo-code for the component with the different register descriptions at the same offset:
 

<component>
  <!-- ... -->
  <mode>
    <name>STATE_0</name>
    <condition>$ipxact_port_value("sel") == 1</condition>
    <portSlice>
      <name>sel</name>
      <portRef portRef="state_select"/>
    </portSlice>
  </mode>
  <!-- ... -->
  <port>
    <name>state_select</name>
    <wire>
      <direction>in</direction>
    </wire>
  </port>
  <!-- ... -->
  <register>
    <alternateRegister>
      <name>foo</name>
      <modeRef priority="1">STATE_0</modeRef>
    </alternateRegister>
  </register>
</component>

This says alternateRegister foo is selected when the STATE_0 mode condition is active. This condition references the value of a port on the component.

You says it's an external register field, so you can use the concept of port fieldMap (fieldMap also new in 1685-2022) in the other component.
 

<component>
  <!-- ... -->
  <port>
    <name>state_sel</name>
    <fieldMap>
      <memoryMapRef memoryMapRef="m"/>
      <addressBlockRef addressBlockRef="b"/>
      <registerRef registerRef="r"/>
      <fieldRef fieldRef="your_control_field"/>
    </fieldMap>
    <wire>
      <direction>out</direction>
    </wire>
  </port>
</component>

You would then connect those ports in a design description. This allows you to explicitly base that mode condition on the value of a field within a different component. That is huge, because it's a common case.

Note:
If the field controlling the "active" register was within the same component, you would simply use a fieldSlice instead of a portSlice to use in the mode condition.

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