ddhiran Posted May 11, 2012 Report Share Posted May 11, 2012 (edited) Hello All, The issue discussed here is regarding the uvm_register_model that was generated using ralgen script by synopsys. After reset, if the register is accessed using hierarchy “ <reg_name>.<field_name>.value “ always returns “zero” even for registers that were configured with “non_zero” reset value. Because of this the coverage collected on the register is wrong. Has anybody faced this issue? The detailed description of the issue is copied below. UVM version used is uvm-1.0p1. VCS version used is Version E-2011.03-3_Full64 Detailed description of issue : --------------------------------------------------------------- The register class copied below was generated using ralgen script. Register class description : ------------------------------------------ class register_a extends uvm_reg; rand uvm_reg_field A1; rand uvm_reg_field A2; local uvm_reg_data_t m_current; local uvm_reg_data_t m_data; local uvm_reg_data_t m_be; local bit m_is_read; covergroup cg_vals (); option.per_instance = 1; A1_value : coverpoint A1.value { bins min = { 16'h0 }; bins max = { 16'hFFFF }; bins others = { [16'h1:16'hFFFE] }; option.weight = 3; } A2_value : coverpoint A2.value { bins min = { 16'h0 }; bins max = { 16'hFFFF }; bins others = { [16'h1:16'hFFFE] }; option.weight = 3; } endgroup : cg_vals function new(string name = "rate_chng_timer"); super.new(name, 32,build_coverage(UVM_CVR_REG_BITS+UVM_CVR_FIELD_VALS)); if (has_coverage(UVM_CVR_REG_BITS)) cg_bits = new(); if (has_coverage(UVM_CVR_FIELD_VALS)) cg_vals = new(); endfunction: new virtual function void build(); this.A1 = uvm_reg_field::type_id::create("A1"); this.A1.configure(this, 16, 0, "RW", 0, 16'hd, 1, 0, 1); this.A2 = uvm_reg_field::type_id::create("A2"); this.A2.configure(this, 16, 16, "RW", 0, 16'hd, 1, 0, 1); endfunction: build `uvm_object_utils(register_a) virtual function void sample(uvm_reg_data_t data, uvm_reg_data_t byte_en, bit is_read, uvm_reg_map map); if (get_coverage(UVM_CVR_REG_BITS)) begin m_current = get(); m_data = data; m_be = byte_en; m_is_read = is_read; cg_bits.sample(); end endfunction endclass : register_a --------------------------------------------------- Rgeister class snippet : ------------------------------------------------------ The register fields are being configured as below : this.A1 = uvm_reg_field::type_id::create("A1"); this.A1.configure(this, 16, 0, "RW", 0, 16'hd, 1, 0, 1); this.A2 = uvm_reg_field::type_id::create("A2"); this.A2.configure(this, 16, 16, "RW", 0, 16'hd, 1, 0, 1); The reset values of the fields as mentioned above is A1 = 16'hd & A1 = 16'hd. ----------------------------------------------------------------- We are facing the following issues : ------------------------------------------------------------------------ Issue1 : After reset, if the register is accessed using the hierarchy : <register_model_instance_name>.<register_a_instance_name>.A1.value , the value read is always zero. While the expected value is 16'hd. Issue 2 : Because of Issue 1 , we see that the coverage collected on the default value of the register is wrong. In the coverpoint A1_value , bins "others" should have been hit because reset value of the register is 16'hd but always bins "min" is hit which is wrong. --------------------------------------------------------------------------- Regards Divya Dhiran Edited May 11, 2012 by ddhiran Quote Link to comment Share on other sites More sharing options...
ddhiran Posted May 11, 2012 Author Report Share Posted May 11, 2012 Hello, Found that in the environment the register_model was not being reset. After resetting the register_model by calling <register_model_inst_name>.reset() the issue got resolved. Regards Divya Quote Link to comment Share on other sites More sharing options...
Recommended Posts
Join the conversation
You can post now and register later. If you have an account, sign in now to post with your account.
Note: Your post will require moderator approval before it will be visible.