kuchen Posted August 9, 2022 Report Share Posted August 9, 2022 In uvm-1.2 source code uvm_vreg.svh, we can call the implement task to dynamically implement virtual register array with the size n. In read/write method, they do not check that if idx is smaller than size n. That is, for example, we can implement a virtual register array of size 2, but access the 10th index of the virtual register. Is it reasonable? Or should there be an enhancement for this case? Thank you for your feedback. Quote Link to comment Share on other sites More sharing options...
Justin Refice Posted August 9, 2022 Report Share Posted August 9, 2022 I've opened https://accellera.mantishub.io/view.php?id=7675 to track this issue, thanks! Quote Link to comment Share on other sites More sharing options...
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