uvm_learner Posted September 16, 2021 Report Share Posted September 16, 2021 I have uvm_seq_items as below. class a_seq_item extends uvm_sequence_item; bit x; bit y; bit z; ............. endclass class b_seq_item extends a_seq_item; bit p; bit q; bit r; ....... endclass I want to use b_seq_item (p,q,r vars) everywhere in my env , but p , q & r should be equal to x,y & z. How can i assign p = x , q = y & r = z? sequencer is using a_seq_item. Quote Link to comment Share on other sites More sharing options...
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