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UVM_REG Methodology Issue, What is the best use model for bus integration 1,2,3

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I've using the Use Model 1 for most of my register sequences. Since my DUT does has counters, interrupts, and status registers (RO) - a lot of DUT action is done without frontdoor reads or writes.

But for vertical re-use, I've been told the the more bus-independent Register Item (with a translator) is preferably. Actual it's a Layered sequence with the running on a downstream bus sequencer.

The problem is with this use model I can't use the grab, ungrab, and is_relevant for the ISR that I want.

Can we have 2 use models in 1 environment . Is it possible to set the default_map to a reg_seqr and if I want to use model 1. I can start a sequencer on the bus sequencer with an adapter in place.

Is there a rule of thumb of when to use which use models. I could see configuration sequences being better as Model 3- Register Layering. Also reads and writes that don't have volatile side effects.

But if your actually doing something that needs to be synchronized with the first model makes more sense.

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