anna Posted November 1, 2020 Report Share Posted November 1, 2020 hi everyone , need help please , Quote Link to comment Share on other sites More sharing options...
AmeyaVS Posted November 1, 2020 Report Share Posted November 1, 2020 Hello @anna, Can you share a sketch of what you want to achieve here? Regards, Ameya Vikram Singh Quote Link to comment Share on other sites More sharing options...
anna Posted November 1, 2020 Author Report Share Posted November 1, 2020 hi Ameya , thanks for your reply, i want to synchronize many incoming delayed data with fifo ( each delayed data with one fifo) , so i need to implement a constant delay for each data with a fifo ) my problem is how to introduce the delay in fifo designing. this is the code of the fifo bloc: #include "systemc.h" #include <iostream> #include <fstream> #include <stdlib.h> template<class T > SC_MODULE(fifo) { sc_in<bool> clk; sc_in<T> data_in; sc_in<bool> valid_in; sc_in<bool> ready_in; sc_out<bool> ready_out; sc_out<T> data_out; sc_out<bool> valid_out; unsigned _size, _first, _items; T* _data; //int sampling_rate; void initialize(){ assert (_size > 0); _first = _items = 0; ready_out.initialize(true); valid_out.initialize(false);} void hw_fifo_method() { _data = new T [_size]; if (valid_in.read() && ready_out.read()) { // store new data item into fifo _data[(_first + _items) % _size] = data_in; ++_items; } if (ready_in.read() && valid_out.read()) { // discard data item that was just read from fifo -- _items; _first = (_first + 1) % _size ; } //Update all output signals. //Valid on next delta-cycle ready_out = (_items < _size); valid_out = (_items >0); data_out = _data[_first]; } fifo(sc_module_name name, unsigned size){ SC_HAS_PROCESS(fifo); SC_METHOD(hw_fifo_method); sensitive << clk.pos();} }; Quote Link to comment Share on other sites More sharing options...
anna Posted November 1, 2020 Author Report Share Posted November 1, 2020 hi @AmeyaVS , thanks for your reply, i want to synchronize many incoming delayed data with fifo ( each delayed data with one fifo) , so i need to implement a constant delay for each data with a fifo ) my problem is how to introduce the delay in fifo designing. this is the code of the fifo bloc: #include "systemc.h" #include <iostream> #include <fstream> #include <stdlib.h> template<class T > SC_MODULE(fifo) { sc_in<bool> clk; sc_in<T> data_in; sc_in<bool> valid_in; sc_in<bool> ready_in; sc_out<bool> ready_out; sc_out<T> data_out; sc_out<bool> valid_out; unsigned _size, _first, _items; T* _data; //int sampling_rate; void initialize(){ assert (_size > 0); _first = _items = 0; ready_out.initialize(true); valid_out.initialize(false);} void hw_fifo_method() { _data = new T [_size]; if (valid_in.read() && ready_out.read()) { // store new data item into fifo _data[(_first + _items) % _size] = data_in; ++_items; } if (ready_in.read() && valid_out.read()) { // discard data item that was just read from fifo -- _items; _first = (_first + 1) % _size ; } //Update all output signals. //Valid on next delta-cycle ready_out = (_items < _size); valid_out = (_items >0); data_out = _data[_first]; } fifo(sc_module_name name, unsigned size){ SC_HAS_PROCESS(fifo); SC_METHOD(hw_fifo_method); sensitive << clk.pos();} }; Quote Link to comment Share on other sites More sharing options...
AmeyaVS Posted November 1, 2020 Report Share Posted November 1, 2020 Hello @anna, You can look at previous post in the forum which might provide an insight: Clock to Q Propogation Delay: You will need to map the SC_METHOD/THREAD processes appropriately. Hope the references help. Regards, Ameya Vikram Singh Quote Link to comment Share on other sites More sharing options...
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