wavy Posted February 7, 2012 Report Share Posted February 7, 2012 When running the pre-defined uvm_reg_hw_reset_seq sequence, I am getting failures on RO fields which have no reset. When configuring these fields, the has_reset bit is clear, resulting in the NO_REG_HW_RESET_TEST attribute being defined for the field. This seems to make sense as a register could have a RW w/ reset field and another field without reset. You would want to test the reset flops and not the others. The UVM User's guide refers to NO_REG_HW_RESET_TEST being checked for blocks and registers. The code for uvm_reg_hw_reset_seq seems to match the documentation. This is inconsistant with uvm_reg_field::configure and seems to be why the tests fails. Am I doing some wrong or is this a bug? A related question... If I add +UVM_RESOURCE_DB_TRACE to my command line, I can see the UVM_INFO message when NO_REG_HW_RESET_TEST is defined. UVM_INFO /tools/uvm/uvm-1.1a/src/base/uvm_resource_db.svh(129) @ 0: reporter [RSRCDB/SET] Resource 'REG::regmodel.IDP.FR_STAT_PEAK_RED.VAL.NO_REG_HW_RESET_TEST' (type <not a class type>) set by <unknown> = (bit) 1 I do not see any RSRCDB messages when running the uvm_reg_hw_reset_seq sequence where the Resource DB should be checked for NO_REG_HW_RESET_TEST. This appears to be because the sequence uses uvm_resource_db::get_by_name rather than uvm_resource_db::read_by_name. Is there a reason for this? It complicates debugging. Thanks, Wavy Quote Link to comment Share on other sites More sharing options...
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