Jump to content

Parameterized Designs


zhon1231
 Share

Recommended Posts

Hi all,

I have a quick question regarding parameterized designs. In my testbench I am initializing a DUT that requires a parameter called BIT_WIDTH. Is there any way to initialize the DUT's BIT_WIDTH using a command line argument?

For example, is the following possible?

vcs .... +COMMAND_LINE_BIT_WIDTH=10....

module top

Design #(.BIT_WIDTH(COMMAND_LINE_BIT_WIDTH)) dut (...);

...

Thanks,

Billy

Link to comment
Share on other sites

thanks for the reply! pvalue looks like what I need. But it does not seem to be working though.

On my vcs command, I added "-pvalue param1=2", but I keep getting "cross module reference errors".

param1 is defined in my top level package.

package top_pkg;

parameter param1 = 4;

import top_pkg::*;

module top;

dut #(.x (param1)) dut1(...);

Any ideas on fixing this?

Link to comment
Share on other sites

Join the conversation

You can post now and register later. If you have an account, sign in now to post with your account.
Note: Your post will require moderator approval before it will be visible.

Guest
Reply to this topic...

×   Pasted as rich text.   Paste as plain text instead

  Only 75 emoji are allowed.

×   Your link has been automatically embedded.   Display as a link instead

×   Your previous content has been restored.   Clear editor

×   You cannot paste images directly. Upload or insert images from URL.

 Share

×
×
  • Create New...