UVM RGM - bytes per address location issue

[drewd]

UVM_RGM reference manual lists that only one byte per address location is supported currently. Is there any workaround for this?

I have 2 bytes of data per address. Each register address locations is offset by one. Currently sizing the registers as follows:

class spi_regs_TX16_VI_PreEmp_type extends uvm_rgm_sized_register #(16);

Addressing mode is set to LOGICAL but getting warnings when I run compare_and_update_bv or update_bv on the registers.

UVM_WARNING @ 26850000000: spi.regs.TX16_VI_PreEmp [uVMRGM] Attempted to access 2 bytes starting at offset d720 : only ffff28e2 bytes available

Is this a limitation of UVM_RGM?

Thanks.

[vishal.jain]

Use set_addressing_width_in_bytes(2)

[drewd]

When I use set_addressing_width_in_bytes(2) with logical addressing also set, I get the following fatal error:

UVM_FATAL @ 0: unnamed-regs [uVMRGM] Addressing mode is logical. Cannot set adressing width as 2

[jadec]

The error message suggests that the arguments to update_bv are not correct. The "offset" is relative so it's trying to access byte d720 within the register. The remaining bytes is negative as well (perhaps your register model failed to do bounds checking on the lookup?).

[drewd]

The register model looks almost identical to the one provided with uvm_rgm examples, aside from having 2 bytes per register and register offset differences as mentioned above.

I do see the following note in the reference manual for uvm_rgm, but just wanted to see if there was a workaround for this:

set_addressing_width_in_bytes

Set the number of bytes that each address location contains. The default is one byte

(and only supported size currently).

[drewd]

jadec - Looks like the first argument was incorrect - I am not seeing those errors now that I changed the offset into the register. I thought it was the offset to the register not inside the register because of the 'type' for the argument.

Thanks for your help!