Problem with multiport usage

[jcmel]

Hi,

 

I have 2 modules:  one Test Bench (TB) and a Device under Test (DUT).

The TB has an output port (p_out) to simulate a power on (bool).

The DUT has an input multiport (p_in) and inside the DUT there are many modules M with one input port (x_in) connected to (p_in).

The idea is to simulate a power on througn TB that is distributed to all internal modules of DUT.

 

Here are the declarations:

 

in TB  :

sc_out<bool> p_out;

 

 

In internal moules of DUT:

sc_in<bool> x_in;

 

In DUT:

sc_port< sc_signal_in_if<bool> , 10, SC_ZERO_OR_MORE_BOUND> p_in;

 

Each time I create an internal modules of DUT,  I create automatically a channel of type sc_signal <bool> sig, that I connect between p_in and x_in by doing :

sc_signal <bool>* sig = new sc_signal <bool> ();

 

p_in(*sig);

x_in(*sig);

 

in main program :

sc_signal < bool> sig_power_on;

 

tb->p_out(sig_power_on);

 

I try to connect the signal to the input multiport p_in by :

p_in(sig_power_on);

 

But I have the error  port cannot be used as a function.

 

Perhaps I don't use the multiport as it would be.

 

Please have you got an idea.

 

Regards

 

 

 

[maehne]

Hello,

 

As far as I understand your design from your description, you don't need to use a multiport at all to achieve the wanted effect of distributing your power on signal to all modules of your system. A single sc_core::sc_signal<bool> sig_power_on can be bound to one output port of type sc_core::sc_out<bool> and as many input ports of type sc_core::sc_in<bool> as you like. Once a new value is written to the out port, this will trigger an event to which the processes reading from the in port in your modules can be made sensitive.

 

Best regards,

 

Torsten Maehne

[jcmel]

Hello,

Thanks for your response,

I tried this way and it works.

 

Best regards,

 

Jean-Claude