srishants Posted February 18, 2011 Report Share Posted February 18, 2011 Hi, The UVM user guide shows an env as a collection of agents and a virtual sequencer. While this is true for a block or a subsystem level env, what is UVM's recommendation for a chip level env? Should chip level env contain instances of subsystem-level-envs or agents? I understand sequences can be written to be highly reusable, but what of the envs? Appreciate your thoughts on this. Thanks, Srishan. Quote Link to comment Share on other sites More sharing options...
srishants Posted February 18, 2011 Author Report Share Posted February 18, 2011 Actually in the user guide there is a diagram in the chapter on Virtual Sequences showing a system level env comprising ethernet_env, cpu_env and a virtual sequencer. Quote Link to comment Share on other sites More sharing options...
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