hweng Posted September 2, 2010 Report Share Posted September 2, 2010 We currently have Vera/RVM env. We are planning to move to System Verilog/VMM env. We are also looking UVM as an alternative to VMM. Has anyone converted from RVM to UVM? If so, can you share your experiences? Quote Link to comment Share on other sites More sharing options...
jsweeten Posted September 17, 2010 Report Share Posted September 17, 2010 I have converted code from RVM to OVM. What the conversion script spit out was only good for reference. It is faster and makes more sense to re-architect and write the code from scratch using the full features of the language than to fix sub-optimal converted code. Quote Link to comment Share on other sites More sharing options...
sri.cvcblr Posted September 24, 2010 Report Share Posted September 24, 2010 While RVM to VMM maybe script-able, moving to UVM/OVM will require re-architecting - in reality. Even plain Vera to SV is not 100% script-able, there were some freeware/shareware stuff, let me know if you need pointers (google probably will show you too). When we did that a while ago, we had to manually do the ports to vir-if and few others. Good luck Srini www.cvcblr.com/blog Quote Link to comment Share on other sites More sharing options...
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