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UVM support in the DVT IDE

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Starting with the 2.9.3 release, the DVT IDE provides support for both UVM-based code development and OVM to UVM migration. Features inlude code templates, inline access to documentation, macro debugging, and dedicated wizards. As an appetizer, see the two snapshots below: one for the OVM to UVM Migration Wizard and the other for the UVM Field Editor, an utility which allows you to easily perform proper field registration as it is required by the UVM methodology. You can find further details online at here.

About DVT http://www.dvteclipse.com
Design and Verification Tools (DVT), an Eclipse-based integrated development environment (IDE), is a modern and powerful, yet easy to use programming platform for e, SystemVerilog and VHDL languages. It enables efficient code writing and simplifies the maintenance of reusable libraries and legacy code. Incorporating advanced code editing features and specific capabilities for design and verification, as well as integrating with all major simulators and the latest verification methodologies, the DVT IDE helps you be more productive and get faster to market.

ovm2uvm_refactor_wizard_preview_page_sca     uvm_field_editor_scaled.png

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  • 3 years later...

More UVM oriented features are available starting with the 3.5 release. For example UVM Browser for exploring all the components of an UVM-based verification environment or Verification Hierarchy to inspect the topology of an UVM-based verification environment.


For an overview of the UVM features in the DVT Eclipse IDE see http://www.dvteclipse.com/UVM_Support_in_DVT_Eclipse.html.



colaj_small.png      uvm_browser_small.png      verification_hierarchy_small.png

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