Hii,
I have in my environment a RTL which has registers interface with data size of 32bits
And I have a register which is defined as a 64bits. I use uvm_reg_adapter and uvm_reg_predicator to update the mirror value of the registers.
When we perform a register write to this register we correctly see 2 write transactions to reg_address and reg_address+4
The adapter capture those transactions and send the correct address, data and byte_en (In our case byte_en is 0b1111 for EACH transaction)
The issue in the uvm_reg_predicator is that the data is saved: reg_item.value[0] |= rw.data << (i * map.get_n_bytes()*8);
And when the second write arrives the mirror value is updated as follows: rg.do_predict(reg_item, predict_kind, rw.byte_en);
Which means the byte_en in this case is 0b00001111, thus the MSB data of the register is not set!
I believe that the byte_en should have been treated like the data itself.
Did any one encounter this issue?
