[get after write doesn't update desired value, mirror gets updated correctly on read]

I see that the write is happening correctly in the RTL, but the get called after write doesn't returns "0" instead of the write value.

the mirror(since explicit prediction) called after read returns the correct value that was written in. 

reg_model.amp_reg.ampstate_8_reg_blk.svm_control_reg.write(.status(status),.value(in_data0), .extension(ext),.parent(this));

ctrl_value = reg_model.amp_reg.reg_blk.control_reg.get();

reg_model.amp_reg.amp_reg.reg_blk.control_reg.read(.status(status), .value(read_data),.extension(ext),.parent(this));

value = reg_model.amp_reg.reg_blk.control_reg.get_mirrored_value();
          `uvm_info("reg_seq", $sformatf("The mirror value is:%0h",value), UVM_HIGH)

        if(ctrl_value == value)   
       begin
              `uvm_info("reg_seq", "svm_control_reg read back value matches write ", UVM_LOW)
       end
 

 

[null value when trying to get register from top reg map by get_reg_by_offset]

Hi, 

 

I have a top level reg map set up as below. In my adapter I am trying to retrieve all the registers by address of incoming reg_item in bus2reg function to simulate burst condition. The get_reg_by_offset call returns null every time. I don't understand why the address is not found considering all the registers have unique offsets. Infact I retrieved the base address of the incoming reg_item to check if I can the register before incrementing for next offset, but it cannot find the register with base address.

Any help is appreciated.

Top register file:

TOP_map = create_map(.name("TOP_map"), .base_addr('hFE00), .n_bytes(1),.endian(UVM_LITTLE_ENDIAN),.byte_addressing(1) );
  default_map = CONTROL_TOP_map;
TOP_map.add_submap(this.int_reg_blk.I2C_INT_map, .offset(8'h7C));
TOP_map.add_submap(this.scan_blk.SCAN_CTL_map, .offset(8'h84));
TOP_map.add_submap(this.ctrl_int_reg_blk.HOR_CTRL_map, .offset(8'h94));
TOP_map.I2C_INT_map.add_hdl_path("********", "RTL"); //didn't want to add proprietary code paths 

 

 

get_reg_by_offset call 

uvm_reg_item in_item = get_item();

base_addr = in_item.map.get_base_addr();

if(!(in_item.map.get_reg_by_offset(base_addr)))

 `uvm_error(get_type_name(), "Register not found in reg map")

else

 registers[i] = in_item.map.get_reg_by_offset(base_addr+1);

 

[RAL Read Method]

On 8/11/2014 at 10:06 PM, hvgbl said:

This POST IS FIX.

 

 In my driver, i had update the data field after a read transaction.

Which reflects the BUS2REG.

 

Thank you everyone, for your precious inputs.

Hi, 

 

what do you mean? how is the data sent to the adapter's bus2reg function?

[problem with uvm ral read/mirror]

I am facing the same issue. I have an explicit predictor connected to the monitor analysis port, provide_respons is set to 0 in the adapter. 

So why does predicter invoke bus2reg again if the monitor write already invoked it? the second time data is incorrect.

[pb_reg_adapter] bus2reg: the addr is:fe7c, wr_rd_en is:0 and the data is:1

[REG_PREDICT] Observed READ transaction to register i2c_reg_model.i2c_enable: value='h1

[pb_reg_adapter] bus2reg: the addr is:fe7c, wr_rd_en is:0 and the data is:0